Processor Microarchitecture

COMP22111 Processor Microarchitecture 10 Semester 1 Undergraduate Level 2 Paul Nutter Unit coordinator Department of Computer Science 1 FHEQ level (Framework for Higher Education Qualifications) ' Middle part of Bachelors ' European Credit Transfer & Accumulation System Rating : 5.0 This course unit aims to reinforce and extend digital hardware development skills which are introduced in the first year. It aims to give students a view of the role of the digital designer, taking an idea and implementing it in silicon. The course unit looks at different architectures and computing paradigms, finishing with a discussion of what technologies may, in the future, replace silicon as the building block of the processor. The syllabus is given below with the sections associated with each concept.First half  1.    Introduction  Overview, introduction to the lab, approaches to design and the management of complexity2.    Introducing Stump  Designing complex systems, RISC v CISC, Stump specification and addressing schemes, Stump ISA3.    Verilog & Testing  Verilog recap and new features - tasks, functions and structural Verilog. Verification, validation and testing - the testbench.4.    Sequential systems design  The processor as a sequential system, datapath and control, register transfer level (RTL) design, Mealy and Moore finite state machines.5.    Designing and Implementing Processors  Implementation of processors from the ISA, architectural design, RTL design, Verilog implementation.6.    Introduction to CMOS  Basic electronics, logic gates in CMOS and design considerations.Second half  7.    Specialised Processing Architectures  Examining DSPs, floating-point (and other) coprocessors, SIMD and vector extensions as well as VLIW.8.    Microarchitectural Structures   Basic building blocks, including register files, FIFOs, RAMs, CAMs, arithmetic circuits (adders and multipliers) and shifters.9.    FPGAs   FPGA mode of operation and its spatial programming model as well as application examples.10.    Technology & Hardware Design Examples  Standard Cell design methodology, PLA, Multiplexer, look-up table technology, investigating circuits and design factors.11.    Computer Aided Design (CAD) Tools   Logic synthesis, constraints, Place & Route, DRCs.12.    Verification and Testing  Analogue and digital simulation, regression testing, production test and yield built-in self-test (BIST).13.    Timing and Clocking   System performance, setup and hold times, jitter, clock skew, clock distribution networks, propagation delay, signal integrity, static timing analysis (STA), clock domains, synchronisation and meta-stability.14.    Future   Limits of Moores' law, understanding the importance of energy efficiency, new manufacturing techniques, memristor-based computing, exotic technologies (Quantum dots, Graphene, Spintronics, etc.). This course unit aims to reinforce and extend digital hardware development skills which are introduced in the first year. It aims to give students a view of the role of the digital designer, taking an idea and implementing it in silicon. The course unit looks at different architectures and computing paradigms, finishing with a discussion of what technologies may, in the future, replace silicon as the building block of the processor. The syllabus is given below with the sections associated with each concept.First half  1.    Introduction  Overview, introduction to the lab, approaches to design and the management of complexity2.    Introducing Stump  Designing complex systems, RISC v CISC, Stump specification and addressing schemes, Stump ISA3.    Verilog & Testing  Verilog recap and new features - tasks, functions and structural Verilog. Verification, validation and testing - the testbench.4.    Sequential systems design  The processor as a sequential system, datapath and control, register transfer level (RTL) design, Mealy and Moore finite state machines.5.    Designing and Implementing Processors  Implementation of processors from the ISA, architectural design, RTL design, Verilog implementation.6.    Introduction to CMOS  Basic electronics, logic gates in CMOS and design considerations.Second half  7.    Specialised Processing Architectures  Examining DSPs, floating-point (and other) coprocessors, SIMD and vector extensions as well as VLIW.8.    Microarchitectural Structures   Basic building blocks, including register files, FIFOs, RAMs, CAMs, arithmetic circuits (adders and multipliers) and shifters.9.    FPGAs   FPGA mode of operation and its spatial programming model as well as application examples.10.    Technology & Hardware Design Examples  Standard Cell design methodology, PLA, Multiplexer, look-up table technology, investigating circuits and design factors.11.    Computer Aided Design (CAD) Tools   Logic synthesis, constraints, Place & Route, DRCs.12.    Verification and Testing  Analogue and digital simulation, regression testing, production test and yield built-in self-test (BIST).13.    Timing and Clocking   System performance, setup and hold times, jitter, clock skew, clock distribution networks, propagation delay, signal integrity, static timing analysis (STA), clock domains, synchronisation and meta-stability.14.    Future   Limits of Moores' law, understanding the importance of energy efficiency, new manufacturing techniques, memristor-based computing, exotic technologies (Quantum dots, Graphene, Spintronics, etc.). The unit aims to build upon the concepts introduced in COMP12111 by taking the material further and expanding students' understanding of the operation of modern computing systems.  ILO 1: Describe important parts of the CAD tool stack including logic synthesis and test as well as placement and routing algorithms.ILO 2: Explain the design factors of Instruction Set Architectures and discuss the differences between RISC and CISC CPUs, identifying key functional components and explaining how they work together to execute instructions.ILO 3: Explain the stages of processor design starting from the Instruction Set Architecture with respect to implementing designs in Verilog.ILO 4: Apply design methodologies to aid in the design of complex digital systems.ILO 5: Explain the operation of sequential systems and design and implement systems consisting of datapath and control elements.ILO 6: Discuss key features of the Verilog language and be able to implement sequential digital systems at the register transfer level (RTL) of the design hierarchy.ILO 7: Explain and evaluate the role of key components of the VLSI CAD tool chain, including logic synthesis, testing, and physical design stages such as placement and routing, and their impact on implementation quality and design trade-offs.ILO 8: Analyse and compare processor and system-level design choices, including specialised compute units and processor technologies (e.g. CPU, GPU, FPGA), in terms of cost, performance, power consumption, scalability, and suitability for different application domains, including consideration of emerging industry trends beyond traditional CMOS scaling. Analytical skills Innovation/creativity Problem solving Other This course unit aims to reinforce and extend digital hardware development skills which are introduced in the first year. It aims to give students a view of the role of the digital designer, taking an idea and implementing it in silicon. The course unit looks at different architectures and computing paradigms, finishing with a discussion of what technologies may, in the future, replace silicon as the building block of the processor. The syllabus is given below with the sections associated with each concept.First half  1.    Introduction  Overview, introduction to the lab, approaches to design and the management of complexity2.    Introducing Stump  Designing complex systems, RISC v CISC, Stump specification and addressing schemes, Stump ISA3.    Verilog & Testing  Verilog recap and new features - tasks, functions and structural Verilog. Verification, validation and testing - the testbench.4.    Sequential systems design  The processor as a sequential system, datapath and control, register transfer level (RTL) design, Mealy and Moore finite state machines.5.    Designing and Implementing Processors  Implementation of processors from the ISA, architectural design, RTL design, Verilog implementation.6.    Introduction to CMOS  Basic electronics, logic gates in CMOS and design considerations.Second half  7.    Specialised Processing Architectures  Examining DSPs, floating-point (and other) coprocessors, SIMD and vector extensions as well as VLIW.8.    Microarchitectural Structures   Basic building blocks, including register files, FIFOs, RAMs, CAMs, arithmetic circuits (adders and multipliers) and shifters.9.    FPGAs   FPGA mode of operation and its spatial programming model as well as application examples.10.    Technology & Hardware Design Examples  Standard Cell design methodology, PLA, Multiplexer, look-up table technology, investigating circuits and design factors.11.    Computer Aided Design (CAD) Tools   Logic synthesis, constraints, Place & Route, DRCs.12.    Verification and Testing  Analogue and digital simulation, regression testing, production test and yield built-in self-test (BIST).13.    Timing and Clocking   System performance, setup and hold times, jitter, clock skew, clock distribution networks, propagation delay, signal integrity, static timing analysis (STA), clock domains, synchronisation and meta-stability.14.    Future   Limits of Moores' law, understanding the importance of energy efficiency, new manufacturing techniques, memristor-based computing, exotic technologies (Quantum dots, Graphene, Spintronics, etc.). Each week approximately one hour of material will be presented as asynchronous videos, which will be supported by online quizzes in Blackboard. Each week there will be a one-hour synchronous activity focused on supporting the lab activities (introducing lbs and giving feedback), presenting additional worked examples and running more quizzes to support student learning. In weeks 3 – 11 there will one 2-hour synchronous laboratory session per week 1 Written exam 50% 8 Practical skills assessment 50% Feedback is provided via formative quizzes in Blackboard and via automated marking for laboratory work, with feedback on work being delivered by email. COMP12111 Fundamentals of Computer Engineering Pre-Requisite Compulsory COMP12111 is a pre-requisite.COMP12111 is a pre-requisite. Y <ol><li>Furber, Stephen B. (2000). ARM system-on-chip architecture /. Addison-Wesley, an imprint of Pearson Education,. ISBN:<a href="https://www.librarysearch.manchester.ac.uk/discovery/search?query=isbn,contains,0201675196&search_scope=MyInst_and_CI&sortby=rank&vid=44MAN_INST:MU_NUI&lang=en&mode=advanced&offset=0" target="_blank"> 0201675196</a>  </li><li>Clements, Alan, 1948-. (2006). Principles of computer hardware. Oxford University. ISBN:<a href="https://www.librarysearch.manchester.ac.uk/discovery/search?query=isbn,contains,9780199273133&search_scope=MyInst_and_CI&sortby=rank&vid=44MAN_INST:MU_NUI&lang=en&mode=advanced&offset=0" target="_blank"> 9780199273133</a>  </li><li>Thomas, D. E. (2008). The Verilog hardware description language /. Springer. ISBN:<a href="https://www.librarysearch.manchester.ac.uk/discovery/search?query=isbn,contains,9780387849300&search_scope=MyInst_and_CI&sortby=rank&vid=44MAN_INST:MU_NUI&lang=en&mode=advanced&offset=0" target="_blank"> 9780387849300 </a></li></ol> Assessment written exam 2 Lectures 22 Practical classes & workshops 18 0 58