Implementing System-on-Chip Designs

COMP32211 Implementing System-on-Chip Designs 10 Semester 1 Undergraduate Level 3 Davide Bertozzi Unit coordinator Department of Computer Science 1 FHEQ level (Framework for Higher Education Qualifications) ' Last part of a Bachelors ' European Credit Transfer & Accumulation System Rating : 5.0 Course StructureThis course is structured around a central practical project, supported by a series of lectures. The lectures introduce concepts, techniques, and context that feed directly into the practical work, while the hands-on activities reinforce and illustrate the lecture material. Together, lectures and practical sessions provide a coherent, integrated learning experience that develops both system-level design understanding and practical skills.Practical WorkThe practical part of the course involves migrating the design of a moderately complex finite-state machine (FSM) into a language for hardware description (Verilog), integrating it with other components of a system-on-chip, and verifying that it operates correctly under realistic conditions. Students will demonstrate a working implementation, using a graphics drawing example design so that the final result can be clearly observed on its own display.Lectures in System-Level Digital Hardware DesignThe lectures will revolve around the following topics:•    Introduction  An overview of the course and its objectives, and the role of digital hardware design in modern computing systems.•    Scale and complexity of VLSI systems  The scale of the problem and what a modern VLSI system looks like internally.•    The Verilog Hardware Description Language  Revision of core concepts, together with additional language features used in practical system-level design.•    Functional simulation  Constructing test harnesses and modelling realistic system behaviour.•    Debugging  Identifying common design issues, and systematic approaches to locating and fixing errors.•    Design and tool flows  The tools and processes used to transform source code into silicon, and how design choices affect efficiency and outcomes.•    Timing simulation  Simulating large designs and obtaining sufficiently accurate timing results within practical time constraints.•    Timing and clocking  Clocking strategies, clock distribution, and the challenges of crossing between clock domains.•    Technology  Essential CMOS technology concepts that underpin modern VLSI design.•    Layout and physical design  How physical constraints and layout effects influence the behaviour of an otherwise clean logical design.•    Testing and validation  Techniques for proving that a device is expected to work, and for checking its behaviour once silicon becomes available.•    Future trends  An overview of ongoing developments in silicon fabrication and emerging challenges for digital hardware designers.  Course StructureThis course is structured around a central practical project, supported by a series of lectures. The lectures introduce concepts, techniques, and context that feed directly into the practical work, while the hands-on activities reinforce and illustrate the lecture material. Together, lectures and practical sessions provide a coherent, integrated learning experience that develops both system-level design understanding and practical skills.Practical WorkThe practical part of the course involves migrating the design of a moderately complex finite-state machine (FSM) into a language for hardware description (Verilog), integrating it with other components of a system-on-chip, and verifying that it operates correctly under realistic conditions. Students will demonstrate a working implementation, using a graphics drawing example design so that the final result can be clearly observed on its own display.Lectures in System-Level Digital Hardware DesignThe lectures will revolve around the following topics:•    Introduction  An overview of the course and its objectives, and the role of digital hardware design in modern computing systems.•    Scale and complexity of VLSI systems  The scale of the problem and what a modern VLSI system looks like internally.•    The Verilog Hardware Description Language  Revision of core concepts, together with additional language features used in practical system-level design.•    Functional simulation  Constructing test harnesses and modelling realistic system behaviour.•    Debugging  Identifying common design issues, and systematic approaches to locating and fixing errors.•    Design and tool flows  The tools and processes used to transform source code into silicon, and how design choices affect efficiency and outcomes.•    Timing simulation  Simulating large designs and obtaining sufficiently accurate timing results within practical time constraints.•    Timing and clocking  Clocking strategies, clock distribution, and the challenges of crossing between clock domains.•    Technology  Essential CMOS technology concepts that underpin modern VLSI design.•    Layout and physical design  How physical constraints and layout effects influence the behaviour of an otherwise clean logical design.•    Testing and validation  Techniques for proving that a device is expected to work, and for checking its behaviour once silicon becomes available.•    Future trends  An overview of ongoing developments in silicon fabrication and emerging challenges for digital hardware designers.  The module aims to provide an overview of the processes involved in taking a concept through to a product-level chip. It introduces key design choices available to the implementer and their impact on performance, power, area and feasibility. Through practical work, students develop hands-on experience of the complete design flow, including analysis, implementation and evaluation, alongside the frustration and the satisfaction of delivering a working device.  ILO 1: Plan and carry out digital hardware verification to a credible standard, using simulation-based techniques and appropriate test strategies.ILO 2: Use appropriate terminology to discuss the ASIC design flow, as used industrially, and system-level digital hardware design with professional engineers.ILO 3: Design and implement a finite-state machine (FSM) at Register Transfer Level (RTL), conforming to given technical specifications.ILO 4: Interpret and apply technical specifications of digital hardware interfaces to ensure correct and compliant designs.ILO 5: Apply a digital hardware synthesis flow using Verilog HDL and mainstream industrial CAD tools, from RTL description to a validated implementation.ILO 6: Analyse the theory, good practices, and common pitfalls at each stage of a digital hardware synthesis flow. Analytical skills Innovation/creativity Problem solving Other Course StructureThis course is structured around a central practical project, supported by a series of lectures. The lectures introduce concepts, techniques, and context that feed directly into the practical work, while the hands-on activities reinforce and illustrate the lecture material. Together, lectures and practical sessions provide a coherent, integrated learning experience that develops both system-level design understanding and practical skills.Practical WorkThe practical part of the course involves migrating the design of a moderately complex finite-state machine (FSM) into a language for hardware description (Verilog), integrating it with other components of a system-on-chip, and verifying that it operates correctly under realistic conditions. Students will demonstrate a working implementation, using a graphics drawing example design so that the final result can be clearly observed on its own display.Lectures in System-Level Digital Hardware DesignThe lectures will revolve around the following topics:•    Introduction  An overview of the course and its objectives, and the role of digital hardware design in modern computing systems.•    Scale and complexity of VLSI systems  The scale of the problem and what a modern VLSI system looks like internally.•    The Verilog Hardware Description Language  Revision of core concepts, together with additional language features used in practical system-level design.•    Functional simulation  Constructing test harnesses and modelling realistic system behaviour.•    Debugging  Identifying common design issues, and systematic approaches to locating and fixing errors.•    Design and tool flows  The tools and processes used to transform source code into silicon, and how design choices affect efficiency and outcomes.•    Timing simulation  Simulating large designs and obtaining sufficiently accurate timing results within practical time constraints.•    Timing and clocking  Clocking strategies, clock distribution, and the challenges of crossing between clock domains.•    Technology  Essential CMOS technology concepts that underpin modern VLSI design.•    Layout and physical design  How physical constraints and layout effects influence the behaviour of an otherwise clean logical design.•    Testing and validation  Techniques for proving that a device is expected to work, and for checking its behaviour once silicon becomes available.•    Future trends  An overview of ongoing developments in silicon fabrication and emerging challenges for digital hardware designers.  Lectures11Laboratories2 hours/week (1 hour timetabled, 1 hour independent work) 1 Written exam 50% 8 Practical skills assessment 50% Feedback is given orally in scheduled laboratories; lectures are intended to be active and discussion is encouraged. Annotated listings and diagrams will be returned to students. Feedback as to whether a constructed (video) system operates correctly should be apparent from simulations during the work's progression and will definitely visible in the final realisation. COMP22111 Processor Microarchitecture Pre-Requisite Compulsory COMP22111 is a pre-requisite.COMP22111 is a pre-requisite. Y Assessment written exam 2 Lectures 12 Practical classes & workshops 12 0 74