VLSI Design

EEEN20272 VLSI Design 10 Semester 2 Undergraduate Level 2 Jayawan Hasanka Bandara Wijekoon Herath Mudiyanselage Unit coordinator 1 FHEQ level (Framework for Higher Education Qualifications) ' Middle part of Bachelors ' European Credit Transfer & Accumulation System Rating : 5.0 Brief description of the unit:Static CMOS gates: MOSFET devices, inverter, DC and transient characteristics, logic gates (NAND, NOR, complex gates), transistor sizing.Performance and Power issues: gate delay, delay models, speed optimisation, power dissipation, static and dynamic power, low-power design techniques,Wires and Variability: interconnect, impact of wiring parasitic, variability, technology trends.Physical Design and Verification: EDA tools, layout design, design rules check (DRC), layout versus schematic (LVS), parasitics extraction, simulation, device models and process corners, corner analysis, Monte Carlo methods.CMOS design: Transmission gates, multiplexers, latches and flip-flops, dynamic logic.Memory circuits: static RAM, dynamic RAM. Brief description of the unit:Static CMOS gates: MOSFET devices, inverter, DC and transient characteristics, logic gates (NAND, NOR, complex gates), transistor sizing.Performance and Power issues: gate delay, delay models, speed optimisation, power dissipation, static and dynamic power, low-power design techniques,Wires and Variability: interconnect, impact of wiring parasitic, variability, technology trends.Physical Design and Verification: EDA tools, layout design, design rules check (DRC), layout versus schematic (LVS), parasitics extraction, simulation, device models and process corners, corner analysis, Monte Carlo methods.CMOS design: Transmission gates, multiplexers, latches and flip-flops, dynamic logic.Memory circuits: static RAM, dynamic RAM.  The course unit aims to: To introduce students to the design of Very Large Scale Integration (VLSI) microelectronic circuits, focussing on back-end integrated circuit design (custom transistor-level layout as well as design flow based on standard cells) using Electronic Design Automation (EDA) tools. ILO 1 - Describe the structure and operating characteristics of basic CMOS cells (logic gates, latches) and design styles (static CMOS, dynamic CMOS). [Developed] [Assessed] ILO 2 - Design digital circuits at the transistor-level and develop the corresponding layout for an IC fabrication process. [Developed] [Assessed] ILO 3 - Use industry-standard IC design (EDA) tools to execute the design of a CMOS cell, including transistor-level circuit design, simulation, layout and design verification. [Developed] [Assessed] ILO 4 - Outline the principle of operation of circuits used in memory systems. [Developed] [Assessed] ILO 5 - Select appropriate digital circuit implementations to meet specified system requirements. [Developed] [Assessed] ILO 6 - Explain the performance limitations of CMOS circuits, variability and future technology trends. [Developed] [Assessed] ILO 7 - Produce technical reports relating to coursework and practical assignments. [Developed] [Assessed] <div><div>Teaching and learning processes include twenty hours of lectures, four hours of tutorials and four three-hour laboratory sessions (here, students use industry-standard IC design tool in a computer cluster). Additional support provided using assignment help sessions and an online discussion forum.64 hours of private study expected.</div></div> 0 Other 40% 1 Written exam 60% Written Examination60% of the total markCoursework40% of the total mark. The coursework mark consists of 3 laboratory reports and 1 design assignment. . EEEN10131 Digital System Design I Pre-Requisite Compulsory EEEN20121 Digital Systems Design II Pre-Requisite Compulsory EEEN20222 Electronic Circuit Design II Co-Requisite Compulsory EEEN20232 Microelectronic Components Co-Requisite Compulsory BEng (Hons) Electronic Eng BEng (Hons) Electronic Enginee Second Year Mandatory BEng (Hons) Electronic Eng WIE BEng(Hons) Electronic Eng WIE Second Year Mandatory MEng (Hons) Electronic Enginee MEng (Hons) Electronic Engine Second Year Mandatory MEng (Hons) Electronic Eng WIE MEng Electronic EngineeringWIE Second Year Mandatory N Integrated circuit design by Weste, Neil H. E. Pearson / Addison Wesley, 2011. ISBN: 9780321547743Principles of CMOS VLSI design: a systems perspective by Weste, Neil H. E. Addison-Wesley Pub Co, 1993. ISBN: 0201533766CMOS VLSI design: a circuits and systems perspective by Weste, Neil H. E. Pearson India, 2015. ISBN: 9789332542884CMOS VLSI design: a circuits and systems perspective by Weste, Neil H. E. Pearson Addison Wesley, 2005. ISBN: 0321269772 Lectures 20 Practical classes & workshops 12 Tutorials 4 0 64